04.10.2012 - Malte Brunlieb

Uhrzeit 15:00 Uhr
Ort 34-420


Verification of Software Architectures using Static Code Analysis for Java


This Master’s Thesis focuses on a feasibility analysis of an automatic verification tool for software architectures in the context of the Register Factory®. The Register Factory® is the reference architecture for administrational purposes developed by Capgemini Holding GmbH for the Federal Administration Office of Germany. The Feasibility analysis is done using a pattern based approach, such that the architecture can be converted into a more structural description than plain text. Afterwards, a representative set of patterns are brought into a self-developed machine readable pattern description language. Lastly, a prototype will be developed, which is able to verify the selected set of patterns against given implementations of the customer.

termine/ss12/1210041.txt · Last modified: 05.11.2012 16:41 by paddy